[SOLVED] Current mirror common centroid transistors layout matching

[ben1122]

Hi. I have:
M1 with W=0.24, L=0.54, m=2
M2 with W=0.24, L=2.17, m=2
M3 with W=0.24, L=0.54, m=10
M4 with W=0.24, L=2.17, m=10

Its a current mirror cascode.
I need to design a pattern for layout ( basically I need to design layout, but first of all, the pattern with symmetry, Squared and matching ).
Since I need symmetry, I cant just take something like that on 4x6 for example
M3 at top and second row, M1 M2 at diagonal middle, M4 at bottom second row also
Squared - it wont be 4x6, I guess I have to do it 5x5 and add a dummy one (M5)
Matching, that is the most problem to be honest. there is L which are bigger than others.

I tried of thinking something like this:
3 4 3 4 3
4 1 4 2 4
3 3 d 3 3
4 2 4 1 4
3 4 3 4 3

But I am not really sure.
it is squared, it is symmetric
But about matching, its a little hard to think about it.

 

[dick_freebird]

Expecting "matching" between unequal-L devices
(or any good matching between narrow W) is off
base.

Put the pilot path between two halves of the output
path and call it good. 2x6 arrays.

 

[sidun.av]

I am probably just visualising what @dick_freebird said, but:
1. There is no need of matching between main current mirror devices (M1, M4) and cascode devices (M2, M3), so they can be separate arrays.
2. If your current mirror is not very big (like in your case) it's not necessary to do common centroid, simple interdigitation is enough. Anyway, I am attaching my adea of matching below.

 

[ben1122]

Hi!
Thank you both.
I managed to solve it thanks to the help!!

Case closed

 

[andre_luis]

Next time, consider sharing how it was resolved so that others can benefit from the solution.