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current limiter overshoot

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I still don't see a reasonable specification of the said "maximum inrush current". What's the point of observing an inrush current of 100 ns duration? Who cares about it?

The current waveform nevertheless suggests that the current spike at the end of the 1 µs input voltage ramp is an overshoot of the current limiting amplifier. The MOSFET output capacitance would be good for some 10 mA at 24V/1µs only. And it has the highest current at the ramp start according to the non-linear capacitance characteristic.
 

I still don't see a reasonable specification of the said "maximum inrush current". What's the point of observing an inrush current of 100 ns duration? Who cares about it?

............................
Then you've never worked in the aerospace or commercial world where arbitrary and sometimes unnecessary specifications are cast in stone and can only be changed by an Act of Congress. :wink: The one that cares about it is the customer who made the specification. When the spec/requirement says it is "not allowed" to exceed some input inrush current limit and the test conditions aren't specified, then the implication is that it will not exceed that current level under any input risetime circumstances, whether that may be reasonable in the real world or not, particularly if the vendor originally agreed to those requirements from the customer.
 
Maybe it's like this. I was just asking why, one possible answer is "because the customer demands it".

Nevertheless there must be a specification that is consistent through design implementation and verification. The test cases in this thread didn't seem to follow a consistent specification.

Assuming that 1 µs rise time is part of the specification and the input current isn't allowed to exceed 250 mA at any time under this input condition, then there are good chances to meet the requirements by slightly modifying the current sense and gate control circuit.

There must be - by the way - a measurement bandwidth specification or a defined reference instrument to make "don't exceed 250 mA" unequivocal.
 

Maybe it's like this. I was just asking why, one possible answer is "because the customer demands it".
Exactly, this is the case :)

On the other hand the spec says nothing how to supply the DUT so I'm probably going to keep on using the Lab Power Supply Enable button (in this case the voltage rise time is slow enough to omit the effect). Eventually I could use software LPF in the oscilloscope and just state it clearly in the test report.

This was a very nice discussion! Thank you.
 
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Hi,

i have a solution for your question.
if you put a low inductor in series with your fet, you delete the over current ;)

Your sincerly !
 

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