vivo_m
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Nope, unless you've written the matlab code thinking about the FPGA design from the beginning. It can be very easy to write simple matlab that take hundreds of lines of VHDL to reproduce (for loops, for example). If you dont understand the logic in the first place, you're going to have a big job on your hands.
OK..
let me start again from the begining..
and plzzz help me to simplify it as much as possible... as i've nooo time
and correct me if i'm wrong...
soo noooo synthesis... only simulate..
i know little bit about image/video processing & i know logic design & vhdl..
but as i told you befor
...............
i don't know how to read video using vhdl
i don't know how to extract info about its frame using vhdl
i don't know how to deal with memory (write or read from memo) using vhdl...
(((
any idea how can i do this plzzzzzzzz
guide me with any thing... any helping tutorial or any examples as my search reaches nothing....
thanks...