iVenky
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I am reading "Digital Integrated Circuits" by Jan Rabaey.
I have a doubt in Charge sharing in digital CMOS design. Here's the image
In here the output is initially charged to Vdd.
Now B=0 and A makes a transition from 0 to 1. X is intially at 0.
Here's my doubt.
The author says if the change in the output less than Vtn then the final voltage at X is Vdd - Vtn and if the change in the output is greater than Vtn then the Vout and Vx reach the same value.
How do you say that?
Thanks in advance.
---------- Post added at 17:44 ---------- Previous post was at 17:37 ----------
I got it.
In the first case the device cuts off once it is reached
In the second case the voltage at the drain and source becomes equal and hence there is no current flow after that.
I have a doubt in Charge sharing in digital CMOS design. Here's the image
In here the output is initially charged to Vdd.
Now B=0 and A makes a transition from 0 to 1. X is intially at 0.
Here's my doubt.
The author says if the change in the output less than Vtn then the final voltage at X is Vdd - Vtn and if the change in the output is greater than Vtn then the Vout and Vx reach the same value.
How do you say that?
Thanks in advance.
---------- Post added at 17:44 ---------- Previous post was at 17:37 ----------
I got it.
In the first case the device cuts off once it is reached
In the second case the voltage at the drain and source becomes equal and hence there is no current flow after that.