Challenging switch circuit design

[FriedPope]

This ones got me stumped...

Background: I need two outputs activated by two switches, simple right? Here’s the catch. I want to use both switches to activate one of the outputs. If switch 1 is closed and THEN switch 2 is closed, output A should be high. If switch 2 is closed and THEN switch 1 is closed, output B should be high. There needs to be a time out to reset the switches after a set time and possibly an output C triggered when both inputs are held high at the same time.

Ideas: *Clocked Flip-Flips
*Not much else

I hope this helps some other designers out there. I’d love to hear any input you might have.

 

[flatulent]

This is a classical sequential logic circuit function. It is also sort of a phase detector function.

 

[IanP]

Try this circuit.
The reset timer can be based on 555s or similar..

 

[nand_gates]

Hi,
IanP Excellent work!!!
Outputs A & B are correct
But the output C is not
"output C triggered when both inputs are held high at the same time."
Here input means not A and B but the input from switches I guess.
Please post soln for this also.
Tnx

 

[IanP]

My mistake..
Here the revised version ..

 

[FriedPope]

Thanks IanP,

I have a couple questions though....
1. The component connected directly after the switch, what is it and what is it in turn connected to?
2. I am assuming the IC is a RS FlipFlop?
3. What is the component at the very bottom left past the capacitor, and is it connected to a tri-state buffer?

Thank you both again for your help.

 

[IanP]

1. The component ... it is a pull-up resistor connected to +V
2. D-flip-flop
3. Another pull-up resistor connected to +V

 

[FriedPope]

Me again,
I realize I'm being very picky, but could you please name your gates
I can't tell when your using a NOR gate or a NAND gate, or just a plain inverter.
You've been so very helpful to me, I can't tell you how much I appreciate your time.

Thanks.

 

[IanP]

Both 2-input gates are NANDs and all single input gates are plain inverters ..