CCCS circuit for ADS simulation

[electronicman26]

Hello
I simulated this circuit schematic with ADS, R1 is 0 ohm and R2 is inf, now I want to replace ideal model of CCCS with circuitary model of CCCS, how is it possible?

 

[erikl]

I don't think you can get an exact replacement of the 2 CCCS's, because you have different reference points for the controlling and the controlled current parts. In order to circumvent this problem you'd need additional current mirroring, s. e.g. the following image:

Here, the original currents (through T1, T3) are conveyed via 4 mirror transistors, each (T2-T5-T6-T7 and T4-T10-T11-T12) to the secondary current sources (T8, T13) in order to achieve the different reference points. This, however, means that you create additional currents between the 2 primary nodes.

I'm not even sure if such circuit would work at all.

 

[electronicman26]

Thanks erikl, I try to simulate this circuit and I hope work well

 

[electronicman26]

I don't think you can get an exact replacement of the 2 CCCS's, because you have different reference points for the controlling and the controlled current parts. In order to circumvent this problem you'd need additional current mirroring, s. e.g. the following image:

Here, the original currents (through T1, T3) are conveyed via 4 mirror transistors, each (T2-T5-T6-T7 and T4-T10-T11-T12) to the secondary current sources (T8, T13) in order to achieve the different reference points. This, however, means that you create additional currents between the 2 primary nodes.

I'm not even sure if such circuit would work at all.

Hello erikl
I want to simulate your proposed circuit schematic with ADS and its important for me that simulate the input impedance of this circuit but now I have a problem, how I bias transistors of circuit? where I replace the power supply?

 

[erikl]

... how I bias transistors of circuit?

They should self-bias themselves, as they all are supplied by current.

where I ..place the power supply?

At the 2 input nodes, I'd say.

 

[electronicman26]

They should self-bias themselves, as they all are supplied by current.


At the 2 input nodes, I'd say.

I draw the circuit schematic in ADS and simulate it with S-parameter to calculate input impedance, but I dont know why the result is zero, please help me

 

[erikl]

... why the result is zero

Because the power supply creates a short circuit (Ri=0).

 

[electronicman26]

Because the power supply creates a short circuit (Ri=0).

Thanks
now how is it possible simulation of the input impedance of this circuit?
(it is a two-port circuit that convert R3(1ohm) at port2 to negative impedance in port1)

 

[erikl]

now how is it possible simulation of the input impedance of this circuit?
(it is a two-port circuit that convert R3(1ohm) at port2 to negative impedance in port1)

Now this depends on your simulation capabilities and skills - I have no experience with the ADS simulation system. And I must admit I didn't think about the input impedance measurement.

In my simulation environment, I'd try and use a current source (it has infinite Ri) instead of the voltage source, and change the current until I get reasonable voltages at the top nodes. The current source shouldn't affect the input impedance at all.

 

[electronicman26]

Now this depends on your simulation capabilities and skills - I have no experience with the ADS simulation system. And I must admit I didn't think about the input impedance measurement.

In my simulation environment, I'd try and use a current source (it has infinite Ri) instead of the voltage source, and change the current until I get reasonable voltages at the top nodes. The current source shouldn't affect the input impedance at all.

OK, what you mean from reasonable voltage? Negative voltage?

 

[erikl]

OK, what you mean from reasonable voltage? Negative voltage?

Top nodes! Negative voltage? Tell me: what do you know about analog MOSFET circuits at all?
In your circuit, positive voltage of course, see the (correct) polarity of the power supply connection in your own JPG above!
Depending on process and threshold voltages something between +1 .. +5V.
____
BTW: M7 & M11 in your above JPG image don't provide the required current transmission ratio of G=1.5 (SRC2)

 

[electronicman26]

Top nodes! Negative voltage? Tell me: what do you know about analog MOSFET circuits at all?
In your circuit, positive voltage of course, see the (correct) polarity of the power supply connection in your own JPG above!
Depending on process and threshold voltages something between +1 .. +5V.
____
BTW: M7 & M11 in your above JPG image don't provide the required current transmission ratio of G=1.5 (SRC2)

Excuse me Erikl, I am newbie
I want to simulate this circuit:

of course after replace cccs with mosfet circuit, this 2-port is Negative Impedance Converter and for this I try to simulate the input impedance of it
I would be glad you help me and tell me is my idea correct or no

 

[erikl]

I want to simulate this circuit:

Yes, I know this from your other thread.

... this 2-port is Negative Impedance Converter and for this I try to simulate the input impedance of it
I would be glad you help me and tell me is my idea correct or no

Yes, your idea is ok. Just go on with your simulation! I've told you all what's necessary for it.

 

[electronicman26]

Yes, I know this from your other thread.


Yes, your idea is ok. Just go on with your simulation! I've told you all what's necessary for it.

now I locate a current source instead of voltage source between the up and down nodes, but I dont know how I select transistors width that be in saturation region and current source value

 

[erikl]

... I dont know how I select transistors width that be in saturation region and current source value

This is your job, electronicman, I won't run your simulations. If you don't know better, use the try-and-error method!

 

[electronicman26]

This is your job, electronicman, I won't run your simulations. If you don't know better, use the try-and-error method!

ok but you have exprince, I would be glad you give me good estimation

 

[erikl]

ok but you have exprince, I would be glad you give me good estimation

Ok, in order to make a good estimation you should tell me which process you intend to use, what are the threshold voltages of your pmos and nmos transistors, and what are their technology currents.

 

[electronicman26]

Ok, in order to make a good estimation you should tell me which process you intend to use, what are the threshold voltages of your pmos and nmos transistors, and what are their technology currents.

I use designkit of TSMC 0.13um

 

[erikl]

I use designkit of TSMC 0.13um

Unfortunately I don't have this design kit. AFAIR it contains transistors with |VTH0| = 0.25 .. 0.7V . So you should at least tell me the VTH0 values of the MOSFETs you want to use (find in your models). And their technology currents, if possible (that's the saturation current of a W/L=1 transistor, find those in your PDK docu).

If you don't provide these values, I could only give you a rather rough estimation, which possibly wouldn't fit at all with your models.

 

[electronicman26]

Unfortunately I don't have this design kit. AFAIR it contains transistors with |VTH0| = 0.25 .. 0.7V . So you should at least tell me the VTH0 values of the MOSFETs you want to use (find in your models). And their technology currents, if possible (that's the saturation current of a W/L=1 transistor, find those in your PDK docu).

If you don't provide these values, I could only give you a rather rough estimation, which possibly wouldn't fit at all with your models.

Thanks dear erikl, designkit of TSMC 0.18um is OK too if you have this

for 0.13um:

|VTH0| =0.326

but unfortunately I cant find technology current

I simulated the first circuit(with ideal CCCS model) and draw real part of input impedance vs frequency , it was negative then
I simulated the Mosfet circuit with try and error method and draw real part of input impedance vs frequency but I did not get the desired response yet (it isnt negarive and is positive for all frequency)