SherlockBenedict
Member level 4

I read somewhere that by going into lower voltages in CMOS technology, the speed of the circuit will also gets increased. Can you tell me why?
Thanks
Thanks
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I read somewhere that by going into lower voltages in CMOS technology, the speed of the circuit will also gets increased. Can you tell me why?
There's always an RC slew rate δV/δt limitation. Lower δV --> lower δt .
Same reason is one of the motivations for LVDS usage.
Oh got it. You were talking about the slew rate. Thanks![]()