neazoi
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2.04W Power dissipation is too much for BFR96S...
100mA max. permissible Ic has been mentioned in its datasheet.typical Ic should be around 70mA.
The last transistor dissipates still 1.32W-0.242W=1.078W that is much.Max. persmissible dissipation is 700mW for BFR96S.
It will be over heat without heatsink no doubt..
What shall I do? increase the 5R emitter resistors or play with the base bias?
In fact, your circuit seems to me a bit weird.Which frequency you work at ??If this circuit is buffer, it should normally have a low output impedance but it doesn't.It consists of 2 cascaded stages and the design has some errors in my opinion.The circuit seems to work at low frequencies like roughly DC-30MHz, if it's so why BFR96S ??? There are millions of transistor that are able to yield this power level and maybe more.I couldn't understand of using BFR96S for this frequency band.This transistor is for wideband applications and I used it 30 years ago.
Could you tell me what your exact intention is ??
Find a cheap 2N2222A (1.8W) or 2N2219A (3W) and it will work much better for this application than BFR96.
https://www.farnell.com/datasheets/1449532.pdf
What shall I do? increase the 5R emitter resistors or play with the base bias?
To change only DC feedback without changing RF behaviour you can increase the 15 Ohm emitter resistor, instead of the 5 Ohm that also controls the RF feedback.
But why don't you try to increase the 510 Ohm base resistor first?
I tried different transistors (about 10-15 available in the lab) with high and lower FTs and Ic>100mA. With these circuit values, only the bfr96s gave this performance (-40dbc harmonics), all others were -30 to -37dbc. I cannot explain why this happens but experimentally it seems true.
However, I have not tested the different transistors and at the same time altering the base resistors. Maybe an optimum point could be found with some of them as well.
Can you specify your targets ?? Frequency,Bandwidth,Output Power,Harmonics' Levels,Gain, etc.
Briefly..The frequency range must be 1.8-30MHz
The output power is settable by varying the oscillator coupling to the buffers. An output power of 100mW@50R is desirable and in fact I make all the measurements at this output power and impedance, on the FFT, so some absolute error is acceptable.
The oscillator that drives the buffers, outputs around 200-400mVpp@50R and the harmonics of the oscillator operating alone are more than -50dbc.
The first buffer amplifier, outputs 4.2mW@50R for a 100mW@50R out from the final amplifier.
The harmonics must be kept as low as possible, to ensure low distortion of the sinewave. I am doing this because I do not use LPFs at the output, to make the switching between different bands cheaper and easier. The harmonics now are all below -40dbc (which is already a good value?) at all frequencies at 100mW output.
Briefly..
Output Power=100mW (20dBm) during whole band
Bandwidth=1.8-30MHz
Input Power =( lowest case ) 0.1mW ( -10dBm)
Gain=30dB or slightly more
Input and Output terminations= 50 Ohm
*There will be 2 stages
*Push-Pull configuration ( recommended) will decrease the even order harmonics
I will do something for you, gimme some time...
Here is a preliminary circuit.You should use 2 identical stages in cascade.
View attachment 114756
Gain=42dB
Flatness=0.2dB (1-30MHz)
S11=-25dB or better@50 Ohm
S22=-25dB or better@50 Ohm
P1dB Compression Point=24dBm@30MHz
If you use 10dB-15dB attenuator that will limit the input power upto -20dBm, you'll get very nice Output Spectrum.In this case;
F1=21.7dBm ( F1=30MHz)
2*F1=-49dBc (-27.5dBm)
3*F1=-44.5dBc (-22.8dBm)
It's a very smooth A-Class Linear Amplifier and it consumes approx. 200mA@12V.It might be less of course, you can play around this prototype.
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