assign initail value to signal

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Good discussion, food for thought.

Note that I am mostly concerned with fpga, as said here:

"So if your design is intended to always target an fpga (i.e no plans for ASICs or some such), then as far as I can tell there is no need to ALWAYS do an explicit reset for everything."

Regarding usage of the initial statement, see for example some recommendations regarding the spartan-6. Page 15 of this one: https://www.xilinx.com/support/documentation/user_guides/ug384.pdf


Anyways, lots of good points have been made. Busy reading.
 

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