analog multiplier topology

[simplybharath]

here the 4 PMOS transistors are in saturation and all other NMOS transistors are linear. can anybody explain me how this multiplier works ? if anybody could explain it with equations it will be really helpful

well the o/p is taken as vo1-vo2= (kp/(kn*km))*(xy) [/img]

 

[zopeon]

Hi,
This regards to your question on linear MOSFET analysis and the question on circuit. You have to do small signal analysis as X is dc and x is your sir ac signal. ( I assume) You can consider M1 as Resistor and N1 also as resistor (but variable) . Where the variable value for N1 will depend on y (for ac) and base resistor value will depend on Y. I have uploaded the small signal model for half the circuit. I hope its correct.
Hope this helps

- zopeon