analog logic of comprator based analog circuit

yefj

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Hello, I had a problem when my power supply produced +12V and -12V not at the same time a very slowly.
The following circuit solves this problem like a magic producing +12 -12 pulse at simultaniosly.
However this circuit cannot handle the ripple of my power supply(only 3%).
Is there a way to increase the ability of the circuit to handle the ripple as shown below?
LTspice file is attached.
Thanks.


 

Attachments

  • DualSupplySwitch2_real_bjt.zip
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Perhaps you would be better off improving the test method.
For example you could use (as most ATE does) relays to apply
power from a known stable supply. You can achieve controlled
risetimes and synchrony better than taking whatever one
piece of bench equipment happens to do, and maybe with
less effort and more robustness. For lighter loads and cleaner
switching an analog switch is OK at these voltages (mA range).
But what about -their- supply... I'm getting a shoestring vibe.

Isolating MOSFET gate drivers ("power-thru" or -through?)
can give you amps and short delay.

Understand the thing that's hurting your whatzit and you may
see a simple fix for the hurtzit. Maybe just a diode or two, block
and strap. Maybe a limiting resistor. Understand it and see it.
Maybe even before the Magical Interwebz Answer Machine
coughs up a more directly useful (=?) Magical Answer. That is
the faculty you need to develop in order to succeed at design
in your own right.

If you call patching a random-appearing series of point problems
"design".
 

Usually drawing any current from a supply increases ripple. At the same time output voltage drops. Conceivably your circuit causes too much drop (aggravated by increased ripple) leading to On-Off chatter effect.

There is a circuit called a 'capacitance multiplier' which might help.

A schmitt trigger is able to 'clean up' a noisy waveform. There's the principle of hysteresis. You can create a degree of it in an op amp circuit via a resistance in the positive feedback loop.
 

If you are assuming a specific ripple, you should model it. The provided simulation circuit doesn't thus I don't see a clearly specified problem at all.

Provided schmematic is badly designed regarding Q2 operation.
- Q2 is operated outside maximum ratíngs in Vbe breakdown region
- Q2 is only turned on if Q1 residual Vce is near to zero, not a reasonable threshold condition. Reconsider Q4 control logic

More generally, "ripple sensitivity" is also introduced by C3/R5 and C4/R6 highpasses. Honestly, I don't even get their purpose.
--- Updated ---

Connection of filter capacitor C5 is causing additional ripple sensitivity. You want a filter that doesn't pick up V- ripple and need to add hysteresis, as already suggested.
 
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