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vlsi_whiz said:In Digital Layout, the W/L ratio's used are the minimum feature size. This is done to minimize the area and maximize the packin density. When the area is minimized, the delay also gets minimised. Digital design is easier because we can use cell-based methodology to do a layout, wherein you already have predefined layouts of standard cells and use them to create larger blocks. This saves time and money.
Analog layout on the other hand is tougher as more importance is given to transistor and interconnect details. This is done to acheive matching and the required currents and voltages. Analog design is based mostly on the drain currents and bias voltages. So, layout has to be done carefully to acheive these voltages and currents else the design will fail when manufactured. In analog layout/design we trade off area for performance.