Required Experience: 1-3years of Experience in Analog/Mixed Signal CMOS full-custom Layout.
Value add experiences (Pluses):
Good communication skill is a must.
Experience in NAND FLASH memory layout.
Experience in Cadence Platform.
Scripting: PERL and SKILL.
Knowledge about reliability issues/checks.
PDK and rule-set development.
Full chip development and tape out flow.
Job responsibilities include:
Doing block layouts like Charge Pumps, Sense Amps, I/Os, Reference system.
Full chip layout and taping out the same.
Person will be working with our India and US physical design teams for all tasks.
On technical aspects this person will mentor the team members.
Please reply ASAP with your updated resume to mpfipd@gmail.com