i need to design an RC integrator (without OpAmp) to work as an accumulator, its input is pulses so its output will be triangle wave its rise and fall depending on input
i want to ask:
- what is the parameter that the slop of the output depending on, beside the R and C?
- is the rise slop equal fall slop?
A passive RC circuit can't work exactly as integrator, it's output with square wave input is an exponential rather than a triangle waveform. The behaviour can be described by simple differential equations. https://en.wikipedia.org/wiki/RC_circuit#Time-domain_considerations
A squarewave into a series resistor with a capacitor to ground on the output loaded with a very high impedance is a simple single-order lowpass filter. It reduces the levels of the harmonics of the squarewave.
The only way to get a reasonably linear triangle wave with a RC integrator is to have a long RC time-constant so that the output voltage is much less than the amplitude of the input square-wave. That way you only see the first part of the exponential rise and fall of the RC integrator. The more linear looking you need the triangle to appear, the longer the RC time-constant needs to be.
A passive RC circuit can't work exactly as integrator, it's output with square wave input is an exponential rather than a triangle waveform. The behaviour can be described by simple differential equations. https://en.wikipedia.org/wiki/RC_circuit#Time-domain_considerations
A squarewave into a series resistor with a capacitor to ground on the output loaded with a very high impedance is a simple single-order lowpass filter. It reduces the levels of the harmonics of the squarewave.
The only way to get a reasonably linear triangle wave with a RC integrator is to have a long RC time-constant so that the output voltage is much less than the amplitude of the input square-wave. That way you only see the first part of the exponential rise and fall of the RC integrator. The more linear looking you need the triangle to appear, the longer the RC time-constant needs to be.
the duty cycle of the input= 40u
i already increased the time constant, but the problem is that the rise slop changes slightly in each clk while the R and C are constant
So what causes this Slight changes
If input voltage stream is a clock signal, you may design a current/charge pump to charge/discharge a high quality capacitor by a constant current so you can obtain a triangular waveform depending on input signal. ( see PLL Charge Pumps for inspiration )