Analog Design Virtuoso - BJT pnp Simulations (DC Sweep etc)

[aredhel_vlsi]

dc sweep

Hi again,

I'm trying to simulate the characteristics of a pnp BJT I work at 0.18 umc . I want to find the minimum collector current that can be used.

But first of all, I think I don't do properly the DC Sweep Analyses. I used the circuit at the image below . At the analog Environment I choose:

Session->hSpiceS
Simulation->Netlist ->Create Raw
Setup->Simulator->Spectre
Analyses->Choose->Dc-> Component Parameter-> Component name V1, parameter dc
Outputs to be plotted-> the collector current

and the plot follows.. the collctor current is 0 .what do I do wrong?

 

[rajanarender_suram]

designing with pnp bjt

the method u r doing is right and the plot u got is also right...

When Vdc=0 the Vbe of the transistor(forward voltage for PNP) is 1.8V i.e very high..hence u get mA of current

When Vdc=1.8 the Vbe of the transistor is 0V .. hence u get 0 current

When Vdc=1.1 the Vbe of the transistor is 0.7V u get the current in uA only but its visible in the plots as 0 Current because ur scale is in mA

 

[aredhel_vlsi]

p n p,b j t

Thank you! I want to find the minimum collector current that can be used. how can I get that? I need to get a simulation with the Ic at the x axis , and the VBE at the y axis, somthing like the graph attached below. But I don't get how I can choose the outputs to be ploted, to have VBE.
It may seem so basic , but I haven't found any tutorial in the web to understand how I can get simulations,except some basic transient, so please suggest me something!

 

[aredhel_vlsi]

bjt design simulator

I'm still waiting!

 

[rajanarender_suram]

dc sweep bjt transistor

for finding minimum Ic plot Ic/Ib-Vs-Ic ...i.e. Beta_dc-Vs-Ic... this gives u the range of Ic where Beta is good, that will be the range of Ic for the transistor.

To plot it wrt Vbe connect the V1 source between +ve terminal of V3 and Base of transistor... when u sweep the Vdc its equivalent to sweeping the Vbe

 

[aredhel_vlsi]

bjt pnp model

hello, I 'm back! I still have that problem :
Ive got a pnp BJT transistor.. and I wanna plot the characteristic with the Ic at the x axis, and the Vbe at the y axis. so what should I do?

First of all, how would the schematic be? I put an idc source at the collector, something like the following graph attached! but what should I have at emitter and base? (I supposed a common emitter topology). I put a resistor, so that I don't have the same voltage at nodes B and E.have you got any other proposal?

secondly, I have a problem at expressing the Vbe at the output.they told me I should use the calculator but I can't understand how.
what I did is that ; Ι run a dc analysis, design variable, the Ic (at the x axis, the variable i want to sweep)and I choose the Vb as an output cause i don't know how to put the Vbe.
After that, I have to open the calculator, and express the Vbe. in the topology I've done the E voltage is at ground so it is automatically 0V. problem!

Additionally,about the calculator
Ι want to express Vbc for example. I select net of the B, net of the C and put - symbol.
but it can't be plotted!

few questions, ha? any help or suggestion would be useful for me!

 

[dick_freebird]

bjt dc design

I don't think you are asking the right questions of the
simulator. First off, what defines the "minimum Ic" for
your use? A tolerable beta(effective)? Noise? The load
or pullup attributes, for a reliable logic level?

If you want to do a beta-vs-Ic curve you may find it
better to drive the base with a current source and
sweep it by decades, put sense sources in there so
you can tap I(b) and I(c), do the math there and
plot beta and IC and flip the axis to be the dependent
variable (Ic) rather than the sweep variable, there
you go. To suppress plotting problems in some tools
you may want to abs()+1E-18 anything that will be
used in a denominator (like Ib); driving a voltage
source into the base it is possible and likely that you
will see current pass through zero, you must deal
with it if the tool is too dumb about zero-divide.