anqilo2
Newbie level 1

hello everyone:
for a long time, i have been trying to study the LDO loop stability by doing bode plot and load transient test. however, i can only find many reference information about the zero and pole analysis but not the method of measure or practical test plot.
attached please find the test circuit for bode plot, the reference voltage is 1.25V getting from adj pin to gnd. the output voltage is 2.5V, now i supply a ac source to the adj pin and sweep the frequency response at the ratio of Vo/Vac.
unfortunately, the test result is not perfect, even i do not kown if it is a right tendency.
so, if there is someone could help me, giving me some suggestions or any data, thank you very much.
---a layman for analog
for a long time, i have been trying to study the LDO loop stability by doing bode plot and load transient test. however, i can only find many reference information about the zero and pole analysis but not the method of measure or practical test plot.
attached please find the test circuit for bode plot, the reference voltage is 1.25V getting from adj pin to gnd. the output voltage is 2.5V, now i supply a ac source to the adj pin and sweep the frequency response at the ratio of Vo/Vac.
unfortunately, the test result is not perfect, even i do not kown if it is a right tendency.
so, if there is someone could help me, giving me some suggestions or any data, thank you very much.
---a layman for analog