Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

simultanius powering two opamp devices question

Status
Not open for further replies.

yefj

Advanced Member level 5
Advanced Member level 5
Joined
Sep 12, 2019
Messages
1,520
Helped
1
Reputation
2
Reaction score
5
Trophy points
38
Activity points
9,239
Hell i have a single 5V DC power sourse for two opamps.
the problem is we both opamps open we have a double load so if i connect in parralel my power suplly then my current will be half for each opamp.
given the data sheet bellow,each opamp needs 80uA current,so i put 160uA on my power suply
How do i know the minimal trace width/tickness i need it could sustain this 160uA current threw it?
Thanks.

1688747846472.png
 

160uA is almost negligible, if you are worried about damage, set the PSU current limit to say 10mA or a bit less.

What puzzles me is you say you have a single 5V supply but the schematic shows two supplies, +5V and -5V.

Brian.
 

Hello Brian ,Yes i have +-5V power supply which i intend to split and have two pairs of power rails.
I will get a 3 pint connector one for plus one for - and for GND.
Is it ok?
Thanks.
 

That is a good strategy. What is missing from your schematic are decoupling capacitors. You absolutely must add low ESR capacitors (suggest 1uF and 10nF ceramic in parallel) across the supply pins to ground. They must be as close to the IC as possible and be SMD or have short connecting wires. If you do not add them the circuit will almost certainly be unstable and may simply oscillate.

Brian.
 

In terms of stability this is a very fast opamp, so phase margin challenging.

You have high valued fdbk R's R2, R4, R7, and does not take much stray C
to erode phase margin. Plus you have +fdbk in the form of R7, and you
have a 1` pF C in parallel with it which begs the question, why ? 1 pF probably
swamped out by stray C and the inherent C of R7.

Usually ADI in their datasheets for fast parts show recommended PCB layout,
not this one. Ap note below.





Note your earlier comments about opamps splitting power supply current. Your schematic
shows the supply pins driven by V sources, so there is no "splitting". If you create a single
supply configuration the opamps still draw required bias, otherwise they will not be operating
right. If you do single supply solution make sure your virtual ground is just that, with careful
selection of caps on it to create the AC ground. Or using bias and V- of the opamp supply pins
as ground


Regards, Dana.
 
Last edited:

LTspice doesn't model component and layout parasitics unless you explicitly add it to your circuit.

Regarding post #10 simulation, what do you expect when you put capacitors in parallel to an ideal voltage source?
 

Attachments

  • 1688798827856.png
    1688798827856.png
    26 KB · Views: 121
Last edited:

As FvM points out, the simulation and real life results are likely to be quite different. When the simulator has a voltage source it is presumed to be perfect DC with no trace of any signals on it. In real life your op-amps and other circuits sharing the supply will introduce tiny voltage variations because of the inductance and resistance of the tracks carrying it. The reason for adding the capacitors is to provide some stored power from the PSU at the IC end of the tracks and cables. When there is a brief increase in current, instead of the supply rail dipping, some of the charge in the capacitors is released to keep the voltage stable.

If you really want to simulate them you would have to add an inductance and resistance in series with the supply rails so it looked closer to a real construction. Try adding say 5 Ohms and 1uH in series with the supplies then see the effect of adding the capacitors.

Brian.
 
  • Like
Reactions: yefj

    yefj

    Points: 2
    Helpful Answer Positive Rating
Hello Danadakk,Yes i will try and implement a single supply.
regarding virtual ground advice,its a term from analog design where in opamp with high gain we have V_minus=V_plus.
i thought is an automatic property of the opamp chip.
What is the role of capacitors in creating virtual ground.
If i understand you correctly you want me to add some DC block capacitors.
But where do i need to add them to create this AC virtual ground?
Thanks.

Quote:
"opamps splitting power supply current. Your schematic
shows the supply pins driven by V sources, so there is no "splitting". If you create a single
supply configuration the opamps still draw required bias, otherwise they will not be operating
right. If you do single supply solution make sure your virtual ground is just that, with careful
selection of caps on it to create the AC ground. Or using bias and V- of the opamp supply pins
as ground"

1688808162176.png


1688808345241.png
 

Hi,

160 uA usually is the "no load current" with DC input signal.
Don´t be surprised if the dynamic power supply current it 100 times that big on a fast input edge and some (stray) capacitance at the output.

Klaus
 
  • Like
Reactions: yefj

    yefj

    Points: 2
    Helpful Answer Positive Rating
Hello Kluass ,in the data sheet they specified this number.
So with AC signal the power (currect consumption ) could be 10 times of that.What precaution do i need to make for my opamps not to burn?
do a rail trace suited for 10 times bigger width?
Also if you could please comment on the Danadakk remark i made in post #13
regarding the capacitors for the virtual ground.
Thanks.
 

Hi,

yes, it is specified. But you need to read the test conditions.

You don't need a protection. You just need to be aware of this. I often use 10 mil traces for short power supply connections. They easily can handle a lot more than you need.

Klaus
 

The virtual ground you referred to not the same as when splitting a supply rail :




Measure ESRE -


Regards, Dana.
--- Updated ---

ESR not ESRE
 
Last edited:

Hello Danadakk, i have another case were i have a single 3 pin connector -V ,gnd +V which feeds in parralel 4 chips..
Is there some manual you know that could help me about powering 4 such chips simultaniosly?
Thanks.
1690949875336.png
 

Hi,

What are you asking for?
How to connect all "+" and how to connect all "-"?
Where is the problem?

Maybe there is some difficulty or requirement that I don't see ... but basically it's as simple as connectiong three [LEDs with resistor] in parallel to a single battery.

Klaus
 

Why are you continuously posting in the Analog IC forum although none of the threads is related to IC design?
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top