Constant Current Super Capacitor Bank

[adnan012]

Hi,

I am working on a super-capacitor bank charger. The specs are

Super Capacitor Bank 100F/15V
Charging time required 60 seconds
Input voltage 18V
Max Charging voltage 15V

I am using a synchronous buck with constant current (maximum) loop + CV loop. At startup the charging current is 40A. As the capacitor voltage start rising the charging current starts decreasing. After 60 seconds the 15V at capacitor bank is achieved, at this point current maximum current was 20A. its decreases from 40A to 20A linearly. At startup the PWM on time at high side MOSFET gate is very small and it starts growing as the charge builds up on the capacitor.

I want to know why the current does not stay at 40A through out the charging process. All temperatures are in limits.

Best Regards

 

[Easy peasy]

what is the max power of your charger ?

 

[KlausST]

Hi,

... and where is your schematic?

Ho can we know what happens without a schematic?

Klaus

 

[adnan012]

Thanks for reply

This is the schematics.

--- Updated Jul 26, 2022 ---

what is the max power of your charger ?

Thanks for reply .

I am using 30V 200 A Lab power supple. The voltage level at buck input capacitor is stable. I have verified it on scope .

 

[cupoftea]

I want to know why the current does not stay at 40A through out the charging process.

Because you are not regulating the current.
Your current sense is just the standard current mode current sense...it does not regulate the charge current.

 

[adnan012]

what is the max power of your charger ?

Thanks for reply .

I am using 30V 200 A Lab power supple. The voltage level at buck input capacitor is stable. I have verified it on scope . U

Because you are not regulating the current.
Your current sense is just the standard current mode current sense...it does not regulate the charge current.

Thanks for reply .

How to achieve current regulation?

 

[cupoftea]

How to achieve current regulation?

Like in the attached free LTspice sim.....come back if you want me to adjust it for your currents and voltages etc.

--- Updated Jul 26, 2022 ---

The free attached course in SMPS may also help you
SMPS course_Big folders
[modertor action: removed link to external file server]

SMPS course_little folders
[modertor action: removed link to external file server]

 

[mtwieg]

Seems like you're trying to feed a current sense signal to the SDHIN and SDLIN pins, but the EG1163S datasheet suggests that's not the purpose of those pins. Hard to say for sure because I can't find a version in English.

Is the EG1163S a clone of some other part with English documentation?

Also, are you sure your inductor can conduct 40A without saturating?

 

[adnan012]

I will provide datasheet of the inductor. I have tried to parallel two inductors but the result is same. Also tried to double the mosfet numbers ( 2 high side and 2 low side ) without any improvement.

 

[KlausST]

Hi,

I´m referring to schematic of post#4:
EG1163 feedback pin needs 1.2V for regulation.

In the circuit they feedback the current signal (created by R23 || R24) to the FB pin. But the shunt is just 5mOhms, thus to cause 1.2V you´d need 240A through the shunt. To get it regulated to 40A they lift up the shunt voltage with R25 and R19. But since R19 is connected to the output voltage you get a current limit that depends on output voltage.

To avoid this you could
* replace R19 with a current source
* or omit R19. Use 5V1 zener, supplied from input voltage via a 2k Ohms. And a resistor from this 5V to the FB pin.
Now the 5V are constant and the FB signal is lifted by a constant voltage resulting in a constant current limiter.

Klaus

 

[adnan012]

Thanks for reply.

By removing R19 , it will disable voltage limit .

 

[KlausST]

Hi,

I agree.
Then tell exactly what behaviour you want. Like a V-I diagram.

A simple approach could be to use a zener from output to FB .... maybe add a resistor in series for more soft CC/CV behaviour..
More accurate and more "hard" CC/CV behaviour: add a TL431 circuit..

Klaus

 

[adnan012]

Thanks for reply.

I think i can add MCU to terminate charging once the required voltage are achieved.

--- Updated Jul 27, 2022 ---

Hi,

I agree.
Then tell exactly what behaviour you want. Like a V-I diagram.

A simple approach could be to use a zener from output to FB .... maybe add a resistor in series for more soft CC/CV behaviour..
More accurate and more "hard" CC/CV behaviour: add a TL431 circuit..

Klaus

So the TL431 or zener will trigger once the target voltage is reached. correct?

--- Updated Jul 27, 2022 ---

I will test and will update today.

 

[KlausST]

Hi,

"Trigger" sounds like "latching behaviour", but this isn't the case.
Zeners as well as the TL431 become low resistance above a certain voltage ... thus pulling the FB pin high ... thus reducing charging current.

Klaus

 

[adnan012]

Thanks for reply.

I removed the voltage feedback completely. My test result is as follows

Input voltage 16.5V
Capacitor Voltage 15V

At Startup the current is 52A (from buck to capacitor), After few seconds , the current drops to 42A and remain constant until the capacitor voltage is reached to 14V. (from 0.5v-14V). After this, the current continuously decreases until the the charging process is terminated manually.

Regards

 

[KlausST]

Hi,

Without the voltage feedback the current limit is at 240A....
So if you don´t compensate for the voltage feedback it´s likely to kill something.

Klaus

 

[mtwieg]

Oh now I see the current feedback path with the external op amp U5. Similar to figure 6-1 in the EG1163S datasheet. So yes the setpoint should be 40A (but what is the purpose of R11?).

The issue might be with how the EG1163S error amplifier output interacts with U5 through diode D5. If the error amp is an OTA type with a high output impedance, then it should work ok. But if it's an op amp with a low output impedance (I'm betting it is), then U5 may have a harder time overpowering the error amp. Again, an english datasheet would be helpful.

When you have it set up normally (both CC and CV loops connected), what do you see at the EG1163S FB pin, and pin 6 of U5?

 

[KlausST]

Hi,

Oh now I see the current feedback path with the external op amp U5.

Thanks, I did not realize it until you mentioned it.
I just saw the direct feedback of current to FB pin.

***
So now we have
* voltage feedback with R19/R24 --> FB pin
* direct current feedback --> FB pin
(both are combined so they interfere)
* overcurrent feedback /shutdown --> ERRO pin

Klaus

 

[adnan012]

Thanks for reply.

If i charge the capacitor using a lab power supply in constant current mode , the charging current is constant, until target voltage is achieved. But in case of BUCK initially the very is high and when capacitor voltage reaches to 14V (target is 15) the current starts dropping.

Regards

 

[KlausST]

Hi,

It's not a problem of the BUCK, it's a problem of the regulation type.
Manipulate the schematic in a way that the regulation goes via the FB pin and it will work.

I've told you already my ideas how to do it.

Klaus