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2-State Opamp DC bias question

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analog_fever

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dc bias op amp

Hi all,

I have the classic 2 stage pmos input opamp as shown. I have 5uA flowing through Q10. The question I have is what sets the drain voltage of Q5? How can we control it?

VDD = 5V.
 

Forgot to mention, we need all transistors in saturation.
 

The drain of Q5 is set proportionally by input terminals (+/-, whoever is lower as pedestal plus its threshold). That is also how we define the input common mode range. :D
 

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