zhanch
Junior Member level 3
![Junior Member level 3](/styles/images/ranks/clevel3.gif)
Hi, guys
what's the most popular system level simulation and verification language for the industrial SoC design? SystemC, pure C or system Verilog.
Many thanks,
what's the most popular system level simulation and verification language for the industrial SoC design? SystemC, pure C or system Verilog.
Many thanks,