sample and hold the current? How?

Input voltage signal can be precisely sampled and hold?

How to sample and hold a current? Thanks.

Hi,

use an I --> V converter (in simplest case: an R). then work with V.

Klaus

See the attached diagram below. (The beauty of a MOSFET as a pure voltage controlled device). Make sure you don't have gate leakage though (C should be large enough to hold the voltage in face of gate leakage upto a variation allowed by your specifications). Use metal-oxide-metal capacitor.

Thanks.

Unlike the voltage sample using the capacitor directly, the current sample requires the current mirror. If there is a delta(Vgs) between the current mirror transistors, then it would lead to large current mismatch.

Hi.
You can use LEM current sensors for analog output. Some series also have reference voltage. For better advice I need to know your current type (AC or DC) and range (Amperes).
Also I recommend TI Delfino which have ADC ports with sample and hold function.

And also Vth mismatch between the two transistors will have an impact as well as systematic offset due to Vds mismatch. They can be avoided by going for higher lengths but at the cost of speed.

The current sampling equivalent to a voltage S/H circuit would be an inductor that is shorted by a switch.

I presume you notice yourself that the solution has several drawbacks

- the achievable hold to acquisition time ratio is much worse than for a rather simple voltage S/H circuit

- it needs a current buffer with low input impedance

- its no suitable for IC design

shanmei said:

Thanks.

Unlike the voltage sample using the capacitor directly, the current sample requires the current mirror. If there is a delta(Vgs) between the current mirror transistors, then it would lead to large current mismatch.

Click to expand...

The precision can be improved by adding identical series resistors in the source leads for both transistors. A higher value for the resistors gives higher precision, but also higher power dissipation in the resistors.

Thanks for all your reply.

The input current is a maximum 1mA current with a maximum frequency signal of 10M.

Sampling and hold the Vgs of the current mirror by a capacitor is voltage sample and hold, it smartly converts the sampled voltage into an output current. However, the conversion process I_in to Vgs, and Vgs to I_out may lead larger error, compared with conventional voltage sampling, due to the current mirror mismatch.

Degeneration does help to improve the matching of the current mirror mismatch introduced by the Vth mismatch. However, the degenerated current mirror is suitable for a constant reference current mirroring. If it is used in the variable input current mirror with a large dynamic range (0-1mA), then the voltage drop variation on the source resistor is large, which is not suitable for mininization of the mismatch.


"The current sampling equivalent to a voltage S/H circuit would be an inductor that is shorted by a switch. " Thanks for pointing it out.