Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

TSMC 0.18um CMOS Tech - Question on Maturity

Status
Not open for further replies.
R

rmanalo

Advanced Member level 4
Full Member level 1
Joined
Feb 8, 2017
Messages
107
Helped
16
Reputation
32
Reaction score
16
Trophy points
18
Location
Philippines
Activity points
979
Hi

I've read an article saying It is better to design analog circuits in 0.18um Technology because it is "mature".

[1] What do we mean when we say that the technology is mature?
->I interpret this as the model in the technology file more accurately simulates results, meaning a closer match between simulation and the fabricated chip, is this correct?

[2] I checked my library file and it was marked June 2001. Is this "mature"? Do they update the library file after each "a good amount of time"?

Thanks,

rmanalo
 

Hi. For question 1 I think your answer is right.
For 2, I think they update the library every while. Since you are going to fabricate with them, it should be available to you. You will need a non disclosure agreement (NDA).
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top