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Power analysis for a cmos inverter

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Hi

Could anyone tell me, how do we do the power analysis for cmos inverter in cadence?

Thanks

BB
 

Refer the below link
**broken link removed**
 
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sb_svce2003 said:
Refer the below link
**broken link removed**
Click to expand...

Thanks for the info. Could you pls tel me,what if there are more than one input? How do you measure dynamic power,as there would be 2 inputs and 2 different periods ex: nand, nor ?
How do we do the power analysis for these circuits?
 

BB11 said:
Could you pls tel me,what if there are more than one input? How do you measure dynamic power,as there would be 2 inputs and 2 different periods ex: nand, nor ?
Click to expand...
Use appropriate input stimuli.

BB11 said:
How do we do the power analysis for these circuits?
Click to expand...
Just select appropriate time limits which you want the power analysis to be calculated for. It's all explained in the above tutorial.
 

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