clock signal delay circuit required

I need to generate delayed clocks of 0, 90, 180 and 270 degrees phase shift for an input clock. Can any body propose what kind of circuit i should use. Moreover, i also need to convert the 50% duty cycle clock to 25% duty cycle clock. Any suggestions?

The simplest way is the adoption of an oscilator with a frequency 4x higher than required.
A Ring Counter could generate the desired pulses.

A PLL based circuit could be tried, despite I´m not sure if it works fine with even sclale factor grater than 3x.


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I don't have an option of ring oscillator because i cannot generate clock by myself. Clock is coming from another IC and its frequency also changes. How can i have delayed signals of this clock with 0, 90, 180 and 270 degrees phase shift.

If the frequency changes, a PLL as suggested by andre is the only reasonable option. You would preferably multiply the input frequency by a factor of four to generate the derived signals. What's the frequency range?

Isn't there any easy solution rather than PLL. I am doing an integrated implementation and making an on chip PLL, will by itself a huge task. I can have two times the signal frequency generated from outside the chip. Is it possible with two times frequency.

My signal frequency range is 600MHz to 2.7GHz

Working with this variable range, it is not possible to use a fixed delay-line element.


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I should think it'd be possible to use a DLL for this. Not sure how the jitter or other noise metrics will compare to a PLL, but it'd be easier to stabilize. How? Make a multiple-stage delay element, and take taps off of it for the various phases. The final stage, after four 90 degree delays, will be servo'd to be in phase with the input signal. If each 90 degree delay is identical, then you can get decent 90/180/270 degree signals.

- it is easy at lower frequency but I've never tried 2.7GHz
- 2x clock> /4 Johnson Counter with 4 outputs is what you asked for,
- But they dont make them unless you can make one.
Good luck.... possible but not easy, https://www.eng.auburn.edu/users/daifa01/Top/PubPapers/2009/cfpaper2009-11.pdf

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- it is easy at lower frequency but I've never tried 2.7GHz
- 2x clock> /4 Johnson Counter with 4 outputs is what you asked for,
- But they dont make them unless you can make one.
Good luck.... possible but not easy, http://www.eng.auburn.edu/users/daifa01/Top/PubPapers/2009/cfpaper2009-11.pdf

You did not specify if it must be within the IC or you are allowing external parts. You cannot do it within IC without feedback control system like a PLL or DLL to compensate out variation in process/temp/voltage of semiconductor.

Externally you can generate them relatively accurately with passive L-C networks. Look up a 90 deg hybrid rat race. At lower frequencies and narrow freq range you can construct the rat race with discrete L-C components. At higher frequency you can do it with PC board microstrip/striplines. There is variation versus frequency setting so the passive component approach works over a limited freq range.

There are quite a few synthesizers totally contained, including VCO, that can perform this function.

If you have twice the frequency you can generate these phases but it relies on the 2x frequency source having a duty cycle close to 50%. Phase accuracy will depend on having 50% duty cycle on the 2x source. Basically it is arranging divide by two flipping on rising edge while other flips on trailing edge of 2X clock.