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clarification needed about CMOS buffer presented in a paper

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jimito13

jimito13

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Dear Forum Members,

These days i am going through the paper with title : A 2.3mA 240-to-500MHz 6th-order Active-RC Low-Pass Filter for Ultra-Wideband Transceiver (Le Ye, Huailing Liao, Congyin Shi, Junhua Liu, and Ru Huang - IEEE Asian Solid-State Circuits Conference November 8-10,2010 / Beijing, China).

I need some clarification for the voltage buffer they present in their work.I am uploading the respective image that depicts the circuit they have designed for the voltage buffer.
Can somebody tell me what kind of transistors are the Mn5,Mp5,Mn3,Mp3?I mean which of them are nmos and which of them are pmos?

Thanks in advance for any helpful contribution.

Best Regards,
Jimito13
 

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From the symbols all of them appear to be NMOS, but from the connections and also from the labels Mn3, Mn5 are NMOS and Mp3 Mp5 are PMOS
 
albbg i have made the same thoughts as yours and that is why i am confused and posted this thread here if somebody can enlighten me...
In their description they characterize this circuis as an "adaptive-biased pole-cancellation push-pull source follower",so if it is "another version" of source follower then at least transistors Mn5,Mp5 should be nfets.Right?
 

Since the phase of the signal at the input to the two transistor of the push-pull pair is the same, they have to be of different kind: one N (Mn5) and the other one P (Mp5) so that when one is pushing the other one is pulling.
 
It looks like the symbols for the PMOS devices (those labeled as Mpx) should have the arrow pointing in.
That would tend to indicate the correct flow of current from the top of the circuit toward the bottom.
v_c
 
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