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Recent content by gholamzadeh

  1. G

    error for my vhdl design

    hi i wrote a vhdl code for read and write from sd card,and i have a problem,this error deny me to synthesize this code in xilinx i have 4 array(0 to 160) of std_logic_vector(7 downto 0) ERROR:Pack:18 - The design is too large for the given device and package. ERROR: MAP failed I do not know how...
  2. G

    error for my vhdl design

    hi i wrote a vhdl code for read and write from sd card,and i have a problem,this error deny me to synthesize this code in xilinx ERROR:Pack:18 - The design is too large for the given device and package. ERROR: MAP failed I do not know how little of its size please help me thanx
  3. G

    what are commands need to read from sd card

    hi i want to read from sd card with spi communication,but i dont know the sequence of commands whitch i most send to sd card. please help me thank you
  4. G

    Need USB VHDL code for ft245bm on spartan3...

    i want send data from fpga by ft245bm to pc...thx
  5. G

    Need USB VHDL code for ft245bm on spartan3...

    yes...opencores's ip cores is not compaitable with my usb interface.
  6. G

    Need USB VHDL code for ft245bm on spartan3...

    i need vhdl code for usb FT245BM on spartan3 board. i want to send a number (key pressed by a keypad4*4) from fpga board to pc(Datalogger software on pc) and receive data from pc via usb. plz help me if u have code.
  7. G

    help : error in my code (vhdl code for i2c master simulate on xilinx spartan3)

    thank u about ur opinion...but i don't understand exactly what u said.... master for data transmitting put data on falling edge of sck and slave read data on rising edge of sck....and then process must be sensetive on sck.my problem is in synthesis on xilinx,i must simulate m-state and m2-state...
  8. G

    help : error in my code (vhdl code for i2c master simulate on xilinx spartan3)

    hi....my vhdl code for i2c master have error in synthesis in xilinx....error is about clk and sclk....but modelsim don't show any error! what's wrong about my code? thank u 4 help.. my code: (vhdl code for i2c master simulate on xilinx spartan3) -------------------------------- Library IEEE...
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