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common mode range - refers exclusively to both inputs at that level - so - looking at the internals, connecting one terminal to zero and another to 2v5 does not violate the CM rule.
A pedant might set up a divider string to have the inputs at 2V & 3V to force the EA o/p high.
it is what it is - a 45 year old chip in its design - used for simple low power converters by the million, < 12c US in volume
also;
which can be useful.
you have put a dummy load on the converter ( the zener ) to " stabilize it "
actually at no load - your previous condition - one expects the control to bounce around a bit - as when power goes to the output it is stored as a higher than target Vout on the cap, and it takes a while...
If you follow thru to the logical conclusion of #12 - you can make the snubber a lot simpler and less dissipative - this is what is done in GaN ckts as the high freqs make conventional snubbing problematic for heat.
and what is the resistance between the sw node and the bottom rail when the bottom mosfet is ON ?
- how much time is spent in voltage transition ? ( either way )
- what is the voltage doing in this transition time ? ( either way )
- in a classic 2 fet buck, what are...
Short answer = yes - you will know if you ever get into the hard switching areas ( below resonance ) as the mosfets will get very hot and then go bang !
having said that, you still need just the right amount of dead time above resonance to get perfect ZVS and soft switching
why...
Plenty of our customers seem to be able to make 400kHz work at these low voltages and powers - laser drilled Cu filled vias for heat transfer to sinks,
resonant gate drive, really quite narrow dead times ( 30nS ), carefully designed low capacitance chokes, 4 layer ( or 6 ) boards to...
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