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Posts Forum Title Average Rating Total Rating Last Vote
Post 1505499 in thread: Details of a inductor core saturation measurement circuit. Analog Circuit Design 3 (100%) 3 Mar 19, 2016
Post 1505150 in thread: Injecting energy into the loop to examine its stability is trustworthy or not? Analog Circuit Design 3 (100%) 3 Mar 23, 2016
Post 1502027 in thread: Does a push pull converter need an output inductor Power Electronics 3 (100%) 3 Feb 17, 2021
Post 924637 in thread: 16F676 BASED 90-290 VAC 5 STEP AUTOMATIC DIGITAL STABLIZER Microcontrollers 3 (100%) 3 Apr 29, 2017
Post 1420611 in thread: inverter circuit and asm file Microcontrollers 3 (100%) 3 Apr 9, 2018
Post 1497966 in thread: Detecting short pulses PLD, SPLD, GAL, CPLD, FPGA Design 3 (100%) 3 Feb 11, 2016
Post 1496891 in thread: How to implement a chip level design.what measures need to take , and how to do it..? ASIC Design Methodologies and Tools (Digital) 3 (100%) 3 Feb 18, 2016
Post 690724 in thread: help!!-monte-carlo analysis on a comparator's offset Analog Integrated Circuit (IC) Design, Layout and more 3 (100%) 3 Oct 8, 2018
Post 1496641 in thread: Rthevenin and Vthevenin of the circuit Elementary Electronic Questions 3 (100%) 3 Feb 6, 2016
Post 1493133 in thread: Slight Help Needed in uderstanding the code Microcontrollers 3 (100%) 3 Jan 21, 2016
Post 608465 in thread: What is difference between ron and 1/gds? Analog Circuit Design 3 (100%) 3 Jun 21, 2016
Post 1491019 in thread: Design "Soft switching" into a MOSFET full bridge. Power Electronics 3 (100%) 3 Jan 8, 2016
Post 1490023 in thread: 1kW Flyback converter for battery charging Power Electronics 3 (100%) 3 Jan 13, 2016
Post 1484937 in thread: multi voltage power supply Analog Circuit Design 3 (100%) 3 Dec 6, 2015
Post 1484639 in thread: PCB check is correct Professional Hardware and Electronics Design 3 (100%) 3 Dec 24, 2015
Post 294006 in thread: cadence analog design environment cant plot current ASIC Design Methodologies and Tools (Digital) 3 (100%) 3 Nov 20, 2020
Post 1479674 in thread: Problem With "Power Line Disturbances" Power Electronics 3 (100%) 3 Nov 12, 2015
Post 1471415 in thread: Monte Carlo Simulation for two stage OTA Analog Integrated Circuit (IC) Design, Layout and more 3 (100%) 3 Nov 12, 2018
Post 1478033 in thread: Problem of using CREE SiC MOSFET Model in PSPICE Power Electronics 3 (100%) 3 Mar 13, 2016
Post 1478065 in thread: How to choose bias resistors for long tailed pair Analog Circuit Design 3 (100%) 3 Apr 15, 2016
Post 1476887 in thread: Why gray counters work? PLD, SPLD, GAL, CPLD, FPGA Design 3 (100%) 3 Nov 3, 2015
Post 1472527 in thread: How to decide the no. of layers of a board PCB Routing Schematic Layout software and Simulation programs 3 (100%) 3 Nov 2, 2015
Post 1465241 in thread: how to debug pattern mismatch during simulation of ATPG pattern ASIC Design Methodologies and Tools (Digital) 3 (100%) 3 Dec 17, 2019
Post 1467382 in thread: SMPS Design - 2.7kW thru an RM14 Power Electronics 3 (100%) 3 Sep 18, 2015
Post 1466914 in thread: SMPS Design - 2.7kW thru an RM14 Power Electronics 3 (100%) 3 Sep 8, 2015

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