eem2am
Banned
hello
please can you tell me how the circuit on page four of this.....
http://www.irf.com/technical-info/refdesigns/irplcfl5e.pdf
...manages to give zero voltage switching (ZVS) of the two mosfets?
is it due to the capacitor "CDC" which acts with the inductor "LRES" to make the bridge node (node between fets) slew such as to make the respective fet Drain-Source voltage go to zero before the fet is switched ON?
please can you tell me how the circuit on page four of this.....
http://www.irf.com/technical-info/refdesigns/irplcfl5e.pdf
...manages to give zero voltage switching (ZVS) of the two mosfets?
is it due to the capacitor "CDC" which acts with the inductor "LRES" to make the bridge node (node between fets) slew such as to make the respective fet Drain-Source voltage go to zero before the fet is switched ON?