ZCU102 zynq ultrascale + ADC/DAC connection implementation in ip block design

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Whiteraven

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hello there,

I'm quite a newbie with FPGA's especially Xilinx,
I need a simple block design for zcu102 that implement the use of external
ADC and DAC thru the FMC connector as a reference,
I'm not familiar at all with this kind of block design so any help will do.
I have already searched Xilinx site and forums and all references for this kind of use are for zynq 7000 not the zynq ultrascale + and are not working .

TNX for the help.
 

Hi,

you have not given any specifications for your ADC/DAC, neither have you mentioned what do you intend to do with the acquired/released data. In this scenario it is difficult to provide you with a block diagram. The zcu102 dev board has FMC connectors. This can connect to an external ADC/DAC FMC module (separately purchased).

http://www.hitechglobal.com/FMCModules/16-bit_AD-DA.htm
http://www.analog.com/en/design-cen...ation-boards-kits/ad-dac-fmc.html#eb-overview

Register/s inside zcu102 FPGA <--> Pins connecting to the FMC(prepare the correct XDC file) <--> External ADC/DAC FMC module
 

tnx dpaul,
I will elaborate I'm using zcu102 with ti ads5463evm with the ADC-FMC card connector and ti dac3161evm with FMC-DAC card connector.
I want them both to work 12bit 100msps then apply a fir filter on the sampled signal and then output the signal in analog for other uses.

- - - Updated - - -

vdcxcvvxccxvxcv
 

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