Temporal loop != spatial loop. I think what you are referring to is using a loop for unrolling logic (aka spatial loop), while the OP when using the word loop is he means sequential processing (aka temporal loop), since he mentions higher level programming.
At any rate, using the loop construct you would still need to tell your loop what size (s'range in this case). Now that I think about it, you can read the OP in 2 ways. One is that he doesn't know the word size beforehand while designing. And the other (my assumption in previous post) is that he doesn't know the word size at run time. If he meant unknown during design process, but will be fixed before we get to runtime ... I'll shut up because in that case you do what TrickyDicky said.
If he meant word size also not known during runtime, and we have to do a flexible XOR depending on wordsize, then see my previous post. MMmmh, and it's more likely that he means fixed word size, but he just doesn't know exactly what size just yet, since that's a bit more common.
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or if you're lucky enough to have 2008 support, you can simly write:
op <= xor input;
Yeah, I was wondering ... surely VHDL must have an easy bit-wise xor reduction too. I'm only familiar with verilog and there it would be "op <= ^ input;"
In fact, that's so trivial that I assumed that the OP surely must mean runtime. But, shame on me for making an assumption. tsk.