dainis
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SAN JOSE, Calif., September 20, 2004 – Xilinx, Inc. (NASDAQ: XLNX) today announced the new version 6.3i of the Platform Studio for system-level embedded processing design on Xilinx Platform FPGAs. The Platform Studio tool suite automates a host of architecture-level design steps and offers a powerful new software environment based on the industry-standard Eclipse integrated design environment (IDE). The Platform Studio 6.3i release supports the Xilinx processor solutions, including the MicroBlaze and immersed PowerPC cores, the industry’s most popular soft and hard processors. The new 6.3i release enables system-level design for the newly introduced Virtex-4 LX, SX, and FX device families, and supports the Xilinx Virtex and Spartan-3 Series Platform FPGAs.
The basic Platform Studio 6.3i tool suite supports HW/SW platform design with a wide variety of optimized design engines and introduces the new Platform Studio Software Development Kit (SDK) as an alternative software design environment for power users. Software compiler, debugger, and automatic board support package (BSP) generation as well as a base system builder and enhanced IP creation wizards are all included in Platform Studio. This entire suite of tool components is conveniently bundled with a processing IP library, software drivers, documentation, reference designs and the MicroBlaze soft processor IP core in the new 6.3i release of the Xilinx Embedded Development Kit (EDK).
Software Platform Advancements
Platform Studio SDK 6.3i streamlines the software savvy engineer’s experience with a specialized software design environment based on the industry-standard, open-source Eclipse IDE. Power software developers now have the choice to create code in the basic Platform Studio IDE or alternatively to work in this familiar SW studio environment that is becoming ubiquitous across the embedded industry. The new 6.3i version also introduces a graphical memory map manager to simplify and track the system memory allocation, as well as linker script generation to expedite the process. To save engineers from having to create stacks from scratch, 6.3i IP library also includes a new lightweight TCP/IP network software stack for use with Xilinx hardware processor implementations.
SAN JOSE, Calif., September 20, 2004 – Xilinx, Inc. (NASDAQ: XLNX) today announced the new version 6.3i of the Platform Studio for system-level embedded processing design on Xilinx Platform FPGAs. The Platform Studio tool suite automates a host of architecture-level design steps and offers a powerful new software environment based on the industry-standard Eclipse integrated design environment (IDE). The Platform Studio 6.3i release supports the Xilinx processor solutions, including the MicroBlaze and immersed PowerPC cores, the industry’s most popular soft and hard processors. The new 6.3i release enables system-level design for the newly introduced Virtex-4 LX, SX, and FX device families, and supports the Xilinx Virtex and Spartan-3 Series Platform FPGAs.
The basic Platform Studio 6.3i tool suite supports HW/SW platform design with a wide variety of optimized design engines and introduces the new Platform Studio Software Development Kit (SDK) as an alternative software design environment for power users. Software compiler, debugger, and automatic board support package (BSP) generation as well as a base system builder and enhanced IP creation wizards are all included in Platform Studio. This entire suite of tool components is conveniently bundled with a processing IP library, software drivers, documentation, reference designs and the MicroBlaze soft processor IP core in the new 6.3i release of the Xilinx Embedded Development Kit (EDK).
Software Platform Advancements
Platform Studio SDK 6.3i streamlines the software savvy engineer’s experience with a specialized software design environment based on the industry-standard, open-source Eclipse IDE. Power software developers now have the choice to create code in the basic Platform Studio IDE or alternatively to work in this familiar SW studio environment that is becoming ubiquitous across the embedded industry. The new 6.3i version also introduces a graphical memory map manager to simplify and track the system memory allocation, as well as linker script generation to expedite the process. To save engineers from having to create stacks from scratch, 6.3i IP library also includes a new lightweight TCP/IP network software stack for use with Xilinx hardware processor implementations.
