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Xilinx JTAG Download Problems

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hanstarro

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We are using X2VP4, X2VP7, and X2VP50s. We encountered severe problems when downloading to the bigger FPGA X2VP50.

The problem is with ise 6.2.03i that the done pin never goes high. With ise 6.2.02i the download works (done pin goes high), but the FPGA cannot get loaded twice. Means I have to power down the device.

Why can this problems occur?

-h
 

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