Xilinx ISE DCM Mapping Error

u24c02 · Mar 8, 2014

HI.

I'm using like following that

Code Verilog - [expand]
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dcm dcm_inst (
    .CLKIN_IN ( fclk), 
                  .USER_RST_IN( 1'b0 ), 
                  .CLKFX_OUT( ), 
                  .CLKIN_IBUFG_OUT(clk_out_0 ), 
                  .LOCKED_OUT( lock )
  );
...
assign reset_n = lock;
...
always @(posedge clk_out_0, negedge reset_n) begin
 if(reset_n == 1'b0)begin

...

When i remove 'lock' in that code, Error does not happen,
But i need 'lock' for reset. above code happens error.

error message like following that..

ERROR:LIT:136 - Some of CLK* output pins must be routed if CLKIN pin of DCM
symbol "physical_group_lock/dcm_inst/DCM_INST" is routed.

I don't understand and How am i suppose do that?

Xilinx ISE DCM Mapping Error

u24c02

Advanced Member level 1

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Xilinx ISE DCM Mapping Error

u24c02

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