Hi all,
As for the process of design verification, I thought it would be useful if each one of us briefly demonstrates his/her own experience in building an efficient testbench to validate his/her design...
I only thought of the following items to be considered (of course you may want to consider others):
- Tools used to automatically generate testbench (if any).
- Testbench language used.
- Useful books (if any).
- % time allocated to verification phase (out of total design time).
- Comment and evaluate your experiment.
- What to consider next time.
Hopefully, this thread could become a reference for designers to continually learn about, evaluate, and compare different approaches for design validation.
Thanks for reading,
afnam.