anonymous.
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I want to make a generic Mux. not just generic in the Width of inputs, But the number of inputs too.
something like this:
the problem with this is that it is not synthesizable, DC says Constant value required. how to write this as synthesizable ??
something like this:
Code:
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
----------------------------------------
entity Mux is
generic
(
INPUT_WIDTH : integer := 8;
INPUT_COUNT : integer := 8;
SEL_WIDTH : integer := 3
);
port
(
Inputs : in std_logic_vector((INPUT_WIDTH*INPUT_COUNT)-1 downto 0);
Sel : in std_logic_vector(SEL_WIDTH-1 downto 0);
Output : out std_logic_vector(INPUT_WIDTH-1 downto 0)
);
end entity; -- Mux
----------------------------------------
architecture Arch of Mux is
begin
assert 2**SEL_WIDTH = INPUT_COUNT
report "INPUT_COUNT must be 2**SEL_WIDTH"
severity failure;
Output <= Inputs(((to_integer(unsigned(Sel))+1)*INPUT_WIDTH)-1 downto ((to_integer(unsigned(Sel))*INPUT_WIDTH)));
end architecture; -- Archthe problem with this is that it is not synthesizable, DC says Constant value required. how to write this as synthesizable ??