onion2014
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Hi all,
I have a question about write operation of 6T sram
I know for sram read:
phy2 : Precharge both bitlines high
phy1 : Then turn on wordline, One of the two bitlines will be pulled down by the cell
for sram write, my question is that during phy2, does the bitline and bitline_bar need to be precharged? I got this question from a tutorial because it says:
for SRAM Write:
Drive one bitline high, other low
Then turn on wordline, Bitlines overpower cell
from the schematic, the bitline conditioning circuit is always there. it seems that for write operation, the bitline and bitline_bar are still need to be precharged in phy2. and during phy1, one of the bitline or bitline_bar discharges.
Thanks,
I have a question about write operation of 6T sram
I know for sram read:
phy2 : Precharge both bitlines high
phy1 : Then turn on wordline, One of the two bitlines will be pulled down by the cell
for sram write, my question is that during phy2, does the bitline and bitline_bar need to be precharged? I got this question from a tutorial because it says:
for SRAM Write:
Drive one bitline high, other low
Then turn on wordline, Bitlines overpower cell
from the schematic, the bitline conditioning circuit is always there. it seems that for write operation, the bitline and bitline_bar are still need to be precharged in phy2. and during phy1, one of the bitline or bitline_bar discharges.
Thanks,