Will Groud Plane capacitance delay my digital signal?

[archiees]

Groud Plane capacitance

I am designing a printed circuit board that has traces carrying TTL triggers from a national instrument timing board.
My question is : will it be a bad idea to put a ground plane in the secand layer. I was thinking the capacitance of the traces due to this ground plane might delay my digital signal.

 

[throwaway18]

Groud Plane capacitance

I don't think it will delay the signal significantly however it will change the impedance that the output pin sees.
Fast rising/falling edges contain high frequency energy. When your pcb track is longer than around
λ/20 it starts to act like a trasmission line. You can keep the capacitance down by using thin tracks, the current should be low so the track resistance isn't a problem.

Current flows in loops. If you don't have a groundplane what path will the return current follow? If you have a 300mm long thin ground track with several 90deg bends in it its inductance will be significant.

 

[pvskt]

Re: Groud Plane capacitance

Well, I dont see any strong reason for the ground layer and the adjacent layer's interlayer capacitance to delay the digital signal output from the TTL gate pin.

As long as the pcb stack is correctly designed and impedance properly controlled and the critial lengths not exceeded, the signal delays will be well within the threshold limits.

There can be "n" number of reasons for signal delay. The key factor is impedance control. Try to analyze your digital signal with respect to its rise time...convert rise time to critical length.... and based on that you can quantify whether the adjacent ground layer causes any signal delay or not.

An adjacent ground layer always provides good decoupling between signal layers and a good reference point for the signals.