Why vcvs used in some simulations

[storyee]

I saw some simulation bench. There are vcvs placed between the circuit and a supply, anyone know the reason? is it just like a buffer? but if it is a buffer, in cadence, supply source are ideal, why need buffer then?-

I added a image to this thread, what is the specific reason for the vcvs in the img?

 

[erikl]

what is the specific reason for the vcvs in the img?

I guess this is a circuit for testing the common mode (CM) behavior. Of course the V13 ac source could have been referenced directly to vcmi without using the 2 vcvs's. So I think the circuit has been copied from its differential mode (DM) counterpart test circuit, where one of the 2 vcvs's was vertically mirrored (+/- exchanged).

 

[jimito13]

There are vcvs placed between the circuit and a supply

In your image they are not placed as you say.They are placed between the input signal injection and the circuit's fully differential input.Their purpose is to split the single-ended input signal into equal parts with 180 deg. phase difference and convert it consequently to fully differential.In this case each vcvs has abs(egain)=0.5 (so 0.5 the one -0.5 the other to create the phase difference) and the signal is splitted equally as magnitude.
Additionally from their common output node (-) you can inject the common mode input signal for your circuit.
Furthermore the input impedance of a vcvs is infinite and ofcourse you can use it as an ideal buffer stage with egain=1 apparently.