[SOLVED] Why TSMC leave some useless options in techfiles?

they might be useless to you, but not to others. TSMC provides a lef generator utility, it is up to you to make it match you metal stack and process options.

Many thanks for your response!

But I am confused what the relationship is between the techfile and lef, or the relationship between lef generator and DRC rules.
The point I dont understand is what does the lef generator utility do to match the stacks, just changing the DRC rules for different metal stacks or some other ways?

Take a example, if my selected metal stack is 1p9m or 1p10m, the related DRC pitch is 0.14.
If my selected metal stack is 1p5m, or 1p6m, will the DRC rule's pitch be changed into 0.13/0.135? I mean maybe a different value.

First things first: LEF is a file that tells the synthesis tools what the technology looks like. It is not the same as a DRC deck, it is much simpler and limited. You still have to run DRC with Calibre. Your .tf and .lef files and .rules must match on most things, otherwise your design has more violations than wires.

Pitch and metal stack are not the most correlated process options, so your question is tricky. As a user, you typically will be offered a metal stack or a few variations of it. You will not usually be offered different pitch choices unless you are a preferred customer (very high volume production). But they do exist and for strange reasons. You can have a stack that starts as HVH for M1/M2/M3. You can also have an option to do VHV, which can have a different pitch.

In general, none of these things should be your concern unless you are the first person setting up a PDK in your institution. No users should be playing with these settings.

I get it, thanks!
I am not the first man to set up PDK in my lab, just curious about that phenomenon.