Why is step-up sepic converter unstable with 10uF sepic capacitor?

Hello

Why does the SEPIC converter (5V-15V) with a SEPIC capacitor value of 10uF go unstable?

The exact same sepic converter, but using a 33uF Sepic capacitor is perfectly stable.
Why is the one with the 10uF capacitor unstable?

Also, a sepic converter which steps down from 15V to 5V and uses a 10uF capacitor is perfectly stable.

Why is the 5-15V sepic converter unstable, and the other two are stable?

The LTspice simulations are attached.

Each of these three sepic converters have the follwing common features…
-exact same (uncoupled) sepic inductor values
-exact same switching frequency
-exact same feedback compensation components (except for upper output divider
resistor, slope comp and sense resistor)
-All have load power of 7.5W
-All are current mode


So, what makes the step-up sepic, with a 10uF sepic capacitor, go unstable?



(LTspice sims can be run by saving .txt file as .asc, and then opening in ltspice (free sim) , then hit running man icon.

You 'll notice that the oscillation occurs beyond voltage loop transient frequency. Most likely, it's brought up in the current loop.

So as suggested in your previous thread, don't use uncoupled inductors together with current mode control.

The oscillation occurs , as expected really, at the resonant frequency of (L+L) & C (6850Hz when its a 10uF sepic capacitor).

The feedback loop frequency of the two step up sepics is ~700Hz
The feedback loop frequency of the step down sepic is ~1500Hz.

So as you can see, the unstable operation is not related to the feedback loop frequency, as the stable step-down sepic has a feedback loop frequency closer to the unstable oscillation frequency, and the step-down sepic is stable.

I think that the instability is something to do with subharmonic oscillation.....somehow, the sepic converter tends to instigate subharmonic oscillation in sepics that have duty cycle greater than 50%....even with added slope compensation, these kind of sepics easily fall prey to horrendous oscillation at the (L+L), C frequency.

There is some law that governs what value of sepic capacitor avoids this instability.

The sepic with 33uF sepic capacitor suffers no instability whatsoever.

Always using coupled inductors is one answer, but one cannot always assure the supply of such off-the-shelf parts for large production runs....and custom winding is expensive.
So using uncoupled inductors is the answer.

I suspect that the secret is to assure the delta voltage on the sepic capacitor is always less than 5% of the vin..do you agree?

I think the essential parameter for the observed instability is resonator Q. It can be influenced by different component values, e.g. SEPIC capacitor, also inductor series resistance.

actually that's very true, even the 33uF step-up sepic goes unstable as inductor esr is reduced, as well as sepic cap esr being reduced.

The dv on the sepic capacitor is the peak current multiplied by (R+1/jwc) of the sepic capacitor...I believe this should give a delta voltage on the sepic capacitor of less then 5%..otherwise instability ensues..do you agree?

Another point is that the step down sepic seen in the first post, is stable almost no matter what value of sepic capacitor is used..also, it is stable even if the sepic inductors and capacitors have almost zero esr.
This has precipitated a law of the sepic converter...for constant frequency , current mode sepic converters with duty cycle above 50%, instability caused by ringing at the (L+L), C resonant frequency is potentially a big problem....for sepics with duty cycles less than 50%, this ringing is far less of a problem.

Also, do you agree with the following statements..?
A...For voltage mode sepics, the feedback loop crossover frequency should not be anywhere near the (L+L), C resonant frequency.
B...For current mode,constant off time sepics, well, the (L+L), C resonant frequency is not a problem in them.

Do you agree with A and B?

You should actually try doing some math and analyze the open loop behavior of the SEPIC, with parasitic ESR. It's quite complicated, but probably necessary if you really want to build robust designs.

I agree,
However, I believe that the resonance that is seen is obviously an L,C resonance of the power components.
This is no different to the resonance that is seen between the secondary inductor and output cap of a bridge converter.

I believe this resonance only happens in voltage mode designs, when the feedback loop frequency is too near the L,C resonant frequency.
or slope compensated current mode sepic designs, as they are 'slightly' voltage mode.
This L,C resonance is not seen in current mode, constant off time sepics.
this resonance is not seen in an open loop sepic at the same power and duty cycle, etc.

Certainly your crossover frequency should be below the "resonance" of the blocking capacitors and inductors (which is actually made of a complex RHP zero pair, and a real RHP zero, so it is very different from other converter topologies). And that frequency should be well below the switching frequency. If you're getting subharmonic oscillation due to CMC, then that will happen even in open loop operation. If it only happens closed loop, then it's not subharmonic oscillation in the CMC loop.

ok, but I notice that the unwanted oscillation at the L,L,C resonant frequency only happens when duty cycle >0.5.
The attached is a constant off time sepic of 5v-15v (7.5w)...it doesn't suffer the oscillation with a 10uF cap bu does suffer it if the sepic cap is <10uF.

attached is the constant off time sepic with uncoupeld inductors and spec =
vin=5v
vout=15v
f(sw) = 104khz (like the boosts above)
pout = 7.5w
c(sepic) = 10uF
L,L (sepic) = 27uH

.....so it appears that constant off time sepics are more resilient to the oscillation than constant frequency sepics, and sepics where duty cycle <0.5 don't actually suffer the oscillation at all, no matter how the sepic cap is sized.

Also, there is an open loop sepic with uncoupled inductors in the attached......it does not oscillate no matter how the sepic cap is sized.....this proves that the oscillation is to do with the feedback loop frequency, -and the fact that the oscillation only attacks sepics with duty >50% shows that this feature of uncoupled inductor sepics is to do with the inner current loop, and not so much the outer voltage loop (or current loop if its current that's regulated).

Also, there is a voltage mode sepic attached...and with that one, the size of the sepic cap makes for NO instability (no instability no matter what the cap size is) ...therefore, we can say that this L,L,C ring that is a problem for sepics with uncoupled inductors....is only a problem for CCM current mode sepics with duty cycle above 50%....it s nothing to do with the feedback loop frequency per se.

This is a world first....as there is no article or research paper anywhere in the world which gives us this information about the sepic with uncoupled inductors!...do you agree?