anushaas
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Can you post a schematic?
Looking at the datasheet, you have an input offset voltage of 7 mV max. You also have an input bias current of up to 3.2 microamps (!). These could certainly cause an offset at the output of the buffer!
Your schematic has nothing to supply the input bias current to the opamp. If it is the signal generator then its resistance will cause the offset voltage.
Add a same value resistor in series with the (-) input so that the bias currents cancel.
If the amplifier wasn't oscillating before, it surely will now.The resistor my be around 50kOhms. This may affect upper cutoff frequency.
Your gain may not be flat anymore. Please check on this.
It's a classical Howland current source circuit. But a singular capacitor in the positive feedback branch without corresponding capacitor in the negative branch reduces the phase margin.I don´t understand the second stage. It seems to be a difference amplifier, but then there is the C1/R4 combination feedback to non inverting input.
A feedback to non inverting input is always critical.
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