if you are talking about PSRR in Band gap reference, LDO. then please refer some really good IEEE paper publish by Georgia Tech guys like Vishal Gupta, Dr.Rincon Mora. this will definitely give you some real insight.
Short channel FETs have significant Id/Vds slope (lambda
in old school models, a lower than desired output impedance).
The field "push-back" of the drain-body junction shortens
the channel by a voltage-proportional distance. On a longer
FET, this increment matters less.
Power supply voltage imposes a variable on some devices'
applied voltage & current, which must be nulled by an input
difference (closed loop) or results in an output drift (open
loop).
By increasing the L and maintaining the same w/l , the Ro will increase and hence loop gain will increase and so the PSRR will improve.(the PSRR is typically the inverse transfer function of the loop gain).