why "ground" is not affected by noise through cap

[rom0011]

hi all :

why "ground" or "power" are not affected by noise through capacitor?

For example, a common source nmos input circuit which source is connected
to ground,and its gate is connected a capacitor to ground.
When its gate has a noise voltage spike,because i think capacitor provide a low impedence path from gate to ground at high frequency,why ground is not affected by this noise spike?

 

[karesz]

You see, the capacitor has some low admittance at the interesting frequencies, buut your GND-line or bbetetr, Plane has more lower impedance at the same frequecies, so its practically not affectedby your noise/spikes. In all cases its same affected, but it will attenuated/(practically shorted) betwwen Cadmittance:Rgnd-plane(if GND enough good "working" is)...
K.

 

[dick_freebird]

It is affected, if "ground" is not ideally stiff. Or if your
reference ground, is not the "ground" where the cap returns.

An on-chip "ground" could have nanohenries and ohms between
it and the board / module ground plane. Whether this matters,
depends on what "ground" the circuitry before and after it
see as their reference point.