Why "Gowin" IP Cores available in "Gowin EDA" are encrypted?

[FlyingDutch]

Hello Forum,

I just has got a "Tang Nano 4K" FPGA board wihch has on-board a Gowin chip GW1NSR-LV4C. Here is link to this product:

https://www.aliexpress.com/item/100...=glo2pol&spm=a2g0o.9042311.0.0.27425c0ftZf8Rp

I have installed software for synthesis "Gowin EDA" and download examples of Verilog code from Sipeed Github:

https://github.com/sipeed/TangNano-4K-example

After unzipping I opened the project in "Gowin EDA" - there are used four IP Cores. One of these IP Cores is "video_frame_bufferr.v" - it seems that Gowin IP Cores are encrypted with "base64" code. Here is screenshot from "Gowin EDA" with this IP core open:

--- Updated Feb 17, 2022 ---

And here is text of this file (just begining:

//
//Written by GowinSynthesis
//Product Version "GowinSynthesis V1.9.7.02Beta"
//Tue Jun 01 10:37:23 2021

//Source file index table:
//file0 "\D:/Gowin/Gowin_V1.9.7.02Beta/IDE/ipcore/VFB/data/vfb_top.v"
//file1 "\D:/Gowin/Gowin_V1.9.7.02Beta/IDE/ipcore/VFB/data/vfb_wrapper.vp"
`timescale 100 ps/100 ps
`pragma protect begin_protected
`pragma protect version=1
`pragma protect author="default"
`pragma protect author_info="default"
`pragma protect encrypt_agent="Synplify encryptP1735.pl"
`pragma protect encrypt_agent_info="Synplify encryptP1735.pl Version 1.1"

`pragma protect encoding=(enctype="base64", line_length=76, bytes=256)
`pragma protect key_keyowner="Synplicity",key_keyname="SYNP05_001",key_method="rsa"
`pragma protect key_block
O0Q2VS1uAT+DzYC5YK/2UWC6LUhpHYoFZgv3D649C5lYIkASEVxIi4YMoxMNgoclroFqdDhtJkPO
drQAlexiBGqTaRH6vgcsy2Pc6eUsAPVghfIPxowZL3LJzAMPCYsHchisIdJWYyRVuG6/QKDLh+Be
YqEJSiOw1vkDj1bzfmnicQHEFcDDvR4yA4785GFnTT6dasxd+YLhjI3jOf1b8+g3dJJMXvQRZFZW
kFKlHiwSJSO6sg0Gp6xOh7F8bI/H1FG8cVv7sraqD6WQkDRYJOQ1ICxmzPWbEAj0JupVGg3xaNp7
kvj60wTB0t+bLcSand2URZS2byUR1oc1MD9pcQ==
...
`pragma protect encoding=(enctype="base64", line_length=76, bytes=169440)
`pragma protect data_keyowner="default-ip-vendor"
`pragma protect data_keyname="default-ip-key"
`pragma protect data_method="aes128-cbc"
`pragma protect data_block
+PZe8Qq5bAJmNYVR47hNRj9Yf3WvCyGuewIB5WLloFaaDJz+HhzytZPhcvPszDxyJxRqaEbQNKcN
XRuV8n/8GQr8dFvYlwi34n3PWwraj0aj2U1dA6LHS5TrBHjH5rvzRHg89nuXCr2Yo/DrbQ016Ira
E8F4wl1KVelOudwH2jJkuKLpn00JLxDDZh5WEr8XKu8ZGZ3cUZcf62jJDREa4nhN4mI1vCMk4Jlc
7e8AMF94FWM+iBL7rEoXbnKeuo9nwLG6MNx6HdUkPRsa7v56p/i0akzyp03ZmId3BW/GICdZBivc
...

I just entered this file into on-line (on WWW page) "base64" decoder and this is beginning of encrypted block:

^
lf5QMF?Xu!{bVr<r'jhF4
]
t[ؗ}[
ڏFM]KxDx<{
m
5x]JUN2dM /fV*Qh
xMb5#$\�0_xc>Jnrg0z$=zjLM٘wo 'Y+q @$$G%l\_~op}k3H3+F9RI~6k(.kmohF3qfXG%F;r)Pl7tAM2*2TWԚ\oB&3.5P꣣PJjjX]�̏8wxTBEH$s&0,Ni''F=E}%Mi:R<5:VB>27c
!oިʰN~ bť,'tLGoL~L?ƹ!ע+wy=pͬ:*Qo;jN 7g/5W2�LA)2?49H
7cV>DOGCLv2+HX {|NpEYɮ-,3_àh+`=%.3PPŊ&Q}L=oDk%K%H@M|gLmˑ;5GJ(_R!1x'XKM:KhTncv22Vȵ.!YOEWՏ?{ӟTC|->msx57(sW+,`AU"V@ђNw�cΨ6__Cœ21*tH"Yt[,a:|_<W0r0^W5i&LlӼr-%j䩊e)ޑ{]޵c-4=8vsj1Y~O;ZFXRU

It seems that there are binary data (this encrypted block). My question is: Is IP Core encrypted with "base64" in order to avoid errors during opening this file in "Gowin EDA" editor? And second question is: What are this big binary data - is it a netlist of FPGA primitives of Gowin FPGA or maybe there is more kind of objects? I am very curious what is stored in these IP Cores?

Thanks in advance and Regards

 

[dpaul]

I am very curious what is stored in these IP Cores?
For an encrypted core, I think the IP Core docu is the only way to know "what is stored in......."

btw - you are the 1st person I came across a public forum using the Gowin FPGA and its tool-sets. I would like to hear about the +/- you come across when you are done with a design.

 

[FlyingDutch]

I am very curious what is stored in these IP Cores?
For an encrypted core, I think the IP Core docu is the only way to know "what is stored in......."

btw - you are the 1st person I came across a public forum using the Gowin FPGA and its tool-sets. I would like to hear about the +/- you come across when you are done with a design.

Hello,

there are more pople using Gowin FPGAs and their software tools. I don't remember if this topics(related to Gowin FPGAs) had been discussed on this forum or one of different forums (also English-language). I finished one small project "Brakout"(Arkanoid) game on previoius version of Sipeed "Tang Nano 1K" FPGA board. I wrote on this subject on Polish forum (Forbot.pl) - Here is English translation of this:

https://forbot-pl.translate.goog/fo...&_x_tr_hl=en-US&_x_tr_pto=wapp#comment-168785

For current project on "Tang Nano 4K" board I have to wait for ADC board I bought:

https://pl.aliexpress.com/item/1005...=glo2pol&spm=a2g0o.9042311.0.0.42c95c0fCKZrYG

I would try to build simple "spectrum analyzer" for acoustic frequencies (50Hz-15KHz). On this ADC module board is used IC ADS1256 (ADC 24-bit 30ksps/SPI interface). I would like to use for this project two (maybe more) Gowin IP Cores: "SPI Master" and "FFT" and library for graphics display. I write on this forum when I would have any results.

Thanks and Regards

​

 

[FlyingDutch]

BTW: Gowin FPGAs has two advantages: are available and are relatively cheap.

Best Regards