Re: multiple vias
Lets look at this query from a different perspective...
Via is a connection between two metals.
Imagine there is a metal 2 layer carrying 300uA of current which has to be connected to the source/drain of a transistor. Lets say, you put a single via and a single contact. This will usually have a size of around 0.2x0.2 ie 0.4um²... So this actually means the 300uA of current has to reach the diffusion regions of the transistor through this small region only...
This will lead to problems as this area gets heated up when compared to other areas due to high current density which will lead to a very short life for the device. Also, as long as the device works, it'll see a lot more resistance than expected which might lead to the failure of functionality as well...
So one should not be happy to have put a wide metal at places carrying more current but also suitable increase the contacts and vias to enable easy flow of currents between the different layers.
Hope this helps...
I am a design guy. So layout guys, please correct me if I am wrong...