[SOLVED] Why common source amplifier stage can not drive a low impedence load

[subrata_m]

Hi All,

I am new to this forum . Can anyone explain the following
doubt which is killing me :grin:
In Razavi book just before starting the explanation about source follower stage it is stated that ,
"To achieve a high voltage gain with limited power supply voltage, the load impedance should be as large as possible .If such a stage is to drive a low-impedance load , then a "buffer" must be placed after the amplifier so as to drive the load with negligible loss of the signal level".

My question is if the "CS stage act as a trans conductance amplifier ,
then why it can not drive a low impedance load" .


In the above diagram of CS stage with a load R_L,
Even if output impedance is high which is here approximately R_D , I can not understand why the CS stage can not drive a low impedance load .
My understanding is that high output impedance here will be able to draw more current , which will give better driving capability .

 

[jjx]

Since all resistances are in parallell, the smallest resistance will dictate the overall load resistance (impedance if there would be an inductive or capacitive element).

If R_L is the smallest, say close to zero, your gain will not be very high as per the equation v_out ~ g_m v_gs * R_L (assuming that R_L // R_D // r_o ~ R_L ).

In this case, DC current might indeed be high for a low R_L, but Razavi states what you require to obtain "high voltage gain". Notice that, dependent on the load condition, the current does not necessarily scale with the gain.

 

[subrata_m]

Hi jjx ,

Thank you very much.
I messed it up with the drain resistance R_D and load impedance R_L ,
did not consider the effect of R_L being low on the overall output resistance R_L // R_D // r_o ~ R_L.

Can we say that without a load connected , CS stage has a moderate or high output resistance and moderate open circuit voltage gain ,
but when a low impedance load is connected then output resistance and gain
get reduced drastically .

I am not sure though if we can consider load resistance as a part of output resistance .

 

[erikl]

Can we say that without a load connected , CS stage has a moderate or high output resistance and moderate open circuit voltage gain

Right. Also moderate or high voltage gain.

but when a low impedance load is connected then output resistance and gain get reduced drastically.

Not its output resistance, but the parallel circuit of output impedance and low impedance load.

I am not sure though if we can consider load resistance as a part of output resistance .

You can be sure. For small signal behavior (ac) they are in parallel.