why cmos CML was fast in speed?

[mike_bihan]

why cmos CML was fast in speed?

I assumed that because of CML logic's dominant pole was RL*CL, which RL was most often implemented by poly-resistor and was pretty small compared with normal cmos logic gate's charge and discharge path resistance.

So, CML logic was much faster? Right?

Thanks,
BH

 

[rfsystem]

It is fast already. And because it uses NMOS only. So you do not have to charghe the twice size PMOS in addition to the NMOS. But low activity logic is better with CMOS.

 

[amitbhaiji]

because the parasitic cap in any design is high in comparison to the parasitic inductance... So its better to drive the signal in the form of current rather than in the voltage form....so therfor CML is much faster.

Amit

 

[sutapanaki]

Let me ask you why ECL is faster than conventional TTL for example?
For the same reason CML is faster than the usual logic families in MOS - it is a current mode logic, which means that you steer currents and you keep the voltage swings relatively small - so not much time is needed to charge the parasitics.

 

[willyboy19]

Another important feature of CML is its limited output swing -- it does not require rail-to-rail swing as logic '1' or '0', which saves power and expediates the operation considerably.

Willy

 

[alanbrooke]

In fact, part of the CML circuit only use NMOS, should abandon to use PMOS device due to their inferior unity-gain frequency.
However. The CML also suffer from dissapating more static power than CMOS invertor.

 

[jordan76]

I think it is tradeoff between speed and power.
Faster = more power,less voltage swing (at least in case of CML)

regards,
jordan76

 

[sutapanaki]

It is always a trade-off between speed and power. If you don't want to consume, you can't be fast. If you want to accelerate a car in a short time you need to supply a lot of fuel - a fact of life. Electronics shouldn't be much different.