which tools can be used to generate LEF,TLF,LIB,DB...

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wangyuxin

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tlf lef db

i know how to generate a single LEF files from virtuoso GUI,but how to generated the LEF files,verilog files for a analog block that to be used on SOC design?
 

generate lef

we can generate .LIB (LIBERTY) file using synopsys tool
 

design compiler .tlf

LEF can be generated using GDS of Analog block.Once you get .lib file,library compiler can be used to get .db file. Now the Design compiler/primetime can be used to read .db and get verilog file by back annotation. Am I confusing???
 

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