Is that possilbe to automatically draw logic waveform like the following:
-----------------\/----------------------\/------------
____________/\________________/\_________
timing designer is a powerful tool for drawing waveforms, but in graphical mode. You can draw any required wavefor using just MS word, and it's tables. you can develope some set of templates and copy paste them whenever required. the result will be beautiful and easy to understand.
Is it possible to covert timing designer waveform into plain text format like what I draw above?
I need to incorporate the text waveform into my Verilog HDL source code for documentation purpose.